The invention is a development of the analogue-to-digital coverter described in British Pat. No. 1,266,962 and relates to the temperature compensation thereof.
The earlier arrangement disclosed in British Pat. No. 1,266,962 is shown in FIGS. 1 and 2 and comprises a plurality of stages of which two stages are shown and is suitable particularly when a large number of stages are employed for high resolution and when small analogue currents are to be converted to digital form, as the current level in each stage is similar due to the provision of differential "buffer" amplifiers between each stage. Each stage comprises a current amplifier 10, a full wave bridge rectifier 11 and a detector or comparator 12 and has provision for feeding a fixed offset current into the bridge, equal in magnitude to one half the peak-to-peak full scale output current range. These fixed offsets are provided by current generators 13, 14, 15 and 16.
The simplified circuit diagram of two stages is shown in FIG. 2. The amplifier 10 is formed as a balanced cascade differential amplifier from transistors TR1, 2, 3 and 4 with emitter load resistors R5 and R6 connected to a current source S1. The amplifier drives the bridge rectifier, formed by diodes D1, D2, D3, D4 directly and a bridge current offset is provided by unbalancing the inputs to the bases of TR1 and TR2 by suitable choice of resistors R1, R2, R3, R4. The stages each have two input terminals 20 and 21 and two output terminals 22 and 23 and operate with symmetrical, balanced input and output signal currents.
Current sources S2 and S3 form collector load circuits for the differential amplifier. Each of the sources S1, S2 and S3 are in the form of known precision constant current transistor circuits and are arranged such that, the sum of the currents S2 and S3 is equal to the current S1. The values of R5 and R6 are chosen so that the current flowing through each of transistors TR1, TR2, TR3, TR4, when the bridge is balanced, is substantially larger e.g. at least five times than the maximum change of current through those transistors when the input current changes from maximum to zero.
All stages of the converter employ identical circuits but the polarity of the transistors and diodes is reversed in alternate stages as shown to facilitate direct interconnection.
The detectors 12 are arranged so as to detect the point of reversal of the bridge output current, and provide a logical and output when the current is flowing in one arm of the bridge, and a logical zero when it flows in the opposite arm. The current detector or comparator 12 may comprise e.g. a differential switch or Schmitt trigger circuit.
Although FIGS. 1 and 2 show a two-stage Analogue to Digital converter and a single stage converter respectively, further stages may be added to improve the resolution. When a suitably scaled input signal is applied to the first stage of either arrangement, the logical outputs from the detectors provide a digital version of the input in a code known as Gray or Reflected Binary.
As the balanced analogue input to the differential amplifier of the analogue-to-digital converter is increased linearly from minus full scale, through zero to plus full scale, the full wave rectifier causes the output current to vary from minus full scale through zero to plus full scale and back through zero to minus full scale. A relatively large voltage swing occurs in the differential amplifier to achieve a current reversal in the rectifier and this can cause a speed limitation.
When using semiconductor diodes for the bridge rectifier, as the ambient temperature falls the characteristic forward voltage drop across the semiconductor diode increases. Conversely when the ambient temperature rises the voltage drop decreases. This variation of the voltage drop of the diode with temperature causes variation in the forward bias in the above circuit and there will be corresponding variations in voltage swing at the collectors of the transistors of the differential amplifier so that the points at which a current reversal is achieved in the circuit will be dependent on the ambient temperature.
Thus this known converter will only operate satisfactorily over the temperature range 0.degree. to +50.degree. C.